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war with dsp_outb

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This commit is contained in:
TerraMaster85 2024-12-16 22:08:59 -05:00
parent bc7a8860fd
commit b8086e19ba
4 changed files with 50 additions and 38 deletions
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4
src/audio_transmitter/mod.rs
View file

@ -143,7 +143,7 @@ fn give_output_pcm<T>(pcm: &mut [T], channel: &mut Receiver<PcmSampleMessage>)
where
T: Sample + std::fmt::Debug + FromSample<i64> + FromSample<f64>,
{
print!("ALSA wanted {} samples... ", pcm.len());
trace!("ALSA demands {} samples...", pcm.len());
for outgoing in pcm.iter_mut() {
*outgoing = match channel.try_recv() {
Ok(sample) => sample.to_sample::<T>(),
@ -154,5 +154,5 @@ where
}
};
}
println!("gave them");
trace!("gave ALSA the samples");
}

68
src/dsp_common/carrier.rs
View file

@ -1,13 +1,14 @@
use cpal::Sample;
use tracing::{trace};
const TAU: f64 = 2.0 * std::f64::consts::PI;
pub struct TwoStateCarrier {
pub sample_rate: u32,
pub freq_low: u32,
pub freq_high: u32,
phase_low: u32,
phase_high: u32,
pub sample_rate: f64,
pub freq_low: f64,
pub freq_high: f64,
phase_low: f64,
phase_high: f64,
}
type PcmSample = i64;
@ -18,34 +19,39 @@ pub trait Carrier {
impl Carrier for TwoStateCarrier {
fn byte_into_fsk_samples(&mut self, byte: &u8) -> Vec<PcmSample> {
let mut bits: Vec<u8> = Vec::new();
let mut out: Vec<i64> = Vec::new();
let mut bits: Vec<u8> = vec![];
let mut out: Vec<i64> = vec![];
// MSb first
bits.push((byte ) & 0b0000_0001);
bits.push((byte >> 1) & 0b0000_0010);
bits.push((byte >> 2) & 0b0000_0100);
bits.push((byte >> 3) & 0b0000_1000);
bits.push((byte >> 4) & 0b0001_0000);
bits.push((byte >> 5) & 0b0010_0000);
bits.push((byte >> 6) & 0b0100_0000);
bits.push((byte >> 7) & 0b1000_0000);
bits.push((byte ) & 1);
bits.push((byte >> 1) & 1);
bits.push((byte >> 2) & 1);
bits.push((byte >> 3) & 1);
bits.push((byte >> 4) & 1);
bits.push((byte >> 5) & 1);
bits.push((byte >> 6) & 1);
bits.push((byte >> 7) & 1);
for bit in bits {
for (i, bit) in bits.into_iter().enumerate() {
if bit == 0 {
while self.phase_low < self.sample_rate / self.freq_low {
out.push((self.phase_low as f64 * TAU * self.freq_low as f64 / self.sample_rate as f64).sin().to_sample::<i64>());
self.phase_low += 1;
trace!("low bit {} in fsk code", i);
while (self.phase_low) < self.sample_rate / self.freq_low {
trace!("low bit gen sin");
out.push((self.phase_low * TAU * self.freq_low / self.sample_rate).sin().to_sample::<i64>());
self.phase_low += 1.0;
}
self.phase_low = self.phase_low % self.sample_rate;
} else if bit == 1 {
while self.phase_high < self.sample_rate / self.freq_high {
out.push((self.phase_high as f64 * TAU * self.freq_low as f64 / self.sample_rate as f64).sin().to_sample::<i64>());
self.phase_high += 1;
trace!("high bit {} in fsk code", i);
while (self.phase_high) < self.sample_rate / self.freq_high {
trace!("high bit gen sin");
out.push((self.phase_high * TAU * self.freq_low / self.sample_rate).sin().to_sample::<i64>());
self.phase_high += 1.0;
}
self.phase_high = self.phase_high % self.sample_rate;
}
}
trace!("FSK calculations turned up {:?}", &out);
out
}
}
@ -53,23 +59,23 @@ impl Carrier for TwoStateCarrier {
impl TwoStateCarrier {
pub fn new(freq_low: u32, freq_high: u32, sample_rate: u32) -> Self {
TwoStateCarrier {
freq_low: freq_low,
freq_high: freq_high,
sample_rate: sample_rate,
phase_low: 0,
phase_high: 0,
freq_low: freq_low.into(),
freq_high: freq_high.into(),
sample_rate: sample_rate.into(),
phase_low: 0_f64,
phase_high: 0_f64,
}
}
fn freq_low(mut self, freq_low: u32) {
self.freq_low = freq_low;
self.freq_low = freq_low.into();
}
fn freq_high(mut self, freq_high: u32) {
self.freq_high = freq_high;
self.freq_high = freq_high.into();
}
fn phase_low(mut self, phase_low: u32) {
self.phase_low = phase_low;
self.phase_low = phase_low.into();
}
fn phase_high(mut self, phase_high: u32) {
self.phase_high = phase_high;
self.phase_high = phase_high.into();
}
}

13
src/dsp_outb/mod.rs
View file

@ -20,6 +20,7 @@ pub async fn dsp_outb_main(
let carrier_low = 2400;
let carrier_high = 2500;
// TODO: fetch real sample rate
let mut carrier = TwoStateCarrier::new(carrier_low, carrier_high, 384000);
loop {
@ -35,15 +36,19 @@ pub async fn dsp_outb_main(
))?
}
};
trace!("network frame came in");
let mut txed = 0;
let mut bytes = 0;
for byte in eth_frame {
for samp in carrier.byte_into_fsk_samples(&byte).iter() {
tx_for_wire.send(*samp).await?;
for samp in carrier.byte_into_fsk_samples(&byte) {
tx_for_wire.send(samp).await?;
txed += 1;
}
bytes += 1;
}
println!("done with that");
// TODO: fetch real sample rate
trace!("eth frame modulated and sent ({} bytes, {} samps)", bytes, txed);
//(*carrier_phase * TAU * freq / sample_rate).sin()
}
}

3
src/tap_junction/mod.rs
View file

@ -8,7 +8,7 @@ pub async fn tap_junction_main(
) -> Result<()> {
const MTU: i32 = 1500;
let tap_dev = tokio_tun::Tun::builder()
.tap()
//.tap()
.name("sang")
.mtu(MTU)
.address("10.185.0.1".parse()?)
@ -21,5 +21,6 @@ pub async fn tap_junction_main(
loop {
let frame_length = tap_dev.recv(&mut buf).await?;
println!("{:?}", &buf[..frame_length]);
tx_for_mod.send((&buf[..frame_length]).to_vec()).await?;
}
}