From 7fd68d71fbd6d4c730b077fabaae12889bb5ba05 Mon Sep 17 00:00:00 2001 From: c0repwn3r Date: Tue, 10 May 2022 09:17:28 -0400 Subject: [PATCH] Interrupts now functional --- bin/boot.bin | Bin 512 -> 512 bytes bin/kernel.bin | Bin 4256 -> 7027 bytes obj/kernel/kernel.o | Bin 5140 -> 5604 bytes obj/kernel/platform/interrupts/idt.o | Bin 3084 -> 0 bytes obj/kernel/platform/interrupts/int.o | Bin 1600 -> 4072 bytes obj/kernel/platform/interrupts/int_lowlevel.o | Bin 0 -> 2240 bytes obj/kernel/platform/interrupts/isr.o | Bin 7312 -> 0 bytes os-image.bin | Bin 4768 -> 7539 bytes src/kernel/kernel.c | 7 ++- src/kernel/platform/interrupts/int.c | 29 ++++++++++ src/kernel/platform/interrupts/int.h | 33 +++++++++++ .../platform/interrupts/int_lowlevel.asm | 54 ++++++++++++++++++ 12 files changed, 121 insertions(+), 2 deletions(-) delete mode 100644 obj/kernel/platform/interrupts/idt.o create mode 100644 obj/kernel/platform/interrupts/int_lowlevel.o delete mode 100644 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file mode 100644 index 0000000..3e63985 --- /dev/null +++ b/src/kernel/platform/interrupts/int.c @@ -0,0 +1,29 @@ +#include "int.h" +#include "../../print.h" + +void exception_handler() { + print_str("I"); +} + +void idt_set_descriptor(u8 vector, void* isr, u8 flags) { + idt_entry_t* descriptor = &idt[vector]; + + descriptor->isr_low = (u32)isr & 0xFFFF; + descriptor->kernel_cs = 0x08; // this value can be whatever offset your kernel code selector is in your GDT + descriptor->attributes = flags; + descriptor->isr_high = (u32)isr >> 16; + descriptor->reserved = 0; +} + +void idt_init() { + idtr.base = (u32)&idt[0]; + idtr.limit = (u16)sizeof(idt_entry_t) * 256 - 1; + + for (u8 vector = 0; vector < 32; vector++) { + idt_set_descriptor(vector, isr_stub_table[vector], 0x8E); + isr_stub_table[vector] = TRUE; + } + + __asm__ volatile ("lidt %0" : : "m"(idtr)); // load the new IDT + __asm__ volatile ("sti"); // set the interrupt flag +} \ No newline at end of file diff --git a/src/kernel/platform/interrupts/int.h b/src/kernel/platform/interrupts/int.h new file mode 100644 index 0000000..a58b890 --- /dev/null +++ b/src/kernel/platform/interrupts/int.h @@ -0,0 +1,33 @@ +#ifndef INT_H +#define INT_H + +#include "../types.h" + +typedef struct { + u16 isr_low; // The lower 16 bits of the ISR's address + u16 kernel_cs; // The GDT segment selector that the CPU will load into CS before calling the ISR + u8 reserved; // Set to zero + u8 attributes; // Type and attributes; see the IDT page + u16 isr_high; // The higher 16 bits of the ISR's address +} __attribute__((packed)) idt_entry_t; + +__attribute__((aligned(0x10))) +static idt_entry_t idt[256]; // Create an array of IDT entries; aligned for performance + +typedef struct { + u16 limit; + u32 base; +} __attribute__((packed)) idtr_t; + +static idtr_t idtr; + +__attribute__((noreturn)) +void exception_handler(void); + +void idt_set_descriptor(u8 vector, void* isr, u8 flags); + +extern void* isr_stub_table[]; + +void idt_init(void); + +#endif \ No newline at end of file diff --git a/src/kernel/platform/interrupts/int_lowlevel.asm b/src/kernel/platform/interrupts/int_lowlevel.asm new file mode 100644 index 0000000..a38fd41 --- /dev/null +++ b/src/kernel/platform/interrupts/int_lowlevel.asm @@ -0,0 +1,54 @@ +%macro isr_err_stub 1 +isr_stub_%+%1: + call exception_handler + iret +%endmacro +; if writing for 64-bit, use iretq instead +%macro isr_no_err_stub 1 +isr_stub_%+%1: + call exception_handler + iret +%endmacro + +extern exception_handler +isr_no_err_stub 0 +isr_no_err_stub 1 +isr_no_err_stub 2 +isr_no_err_stub 3 +isr_no_err_stub 4 +isr_no_err_stub 5 +isr_no_err_stub 6 +isr_no_err_stub 7 +isr_err_stub 8 +isr_no_err_stub 9 +isr_err_stub 10 +isr_err_stub 11 +isr_err_stub 12 +isr_err_stub 13 +isr_err_stub 14 +isr_no_err_stub 15 +isr_no_err_stub 16 +isr_err_stub 17 +isr_no_err_stub 18 +isr_no_err_stub 19 +isr_no_err_stub 20 +isr_no_err_stub 21 +isr_no_err_stub 22 +isr_no_err_stub 23 +isr_no_err_stub 24 +isr_no_err_stub 25 +isr_no_err_stub 26 +isr_no_err_stub 27 +isr_no_err_stub 28 +isr_no_err_stub 29 +isr_err_stub 30 +isr_no_err_stub 31 + +global isr_stub_table +isr_stub_table: +%assign i 0 +%rep 32 + dd isr_stub_%+i ; use DQ instead if targeting 64-bit +%assign i i+1 +%endrep +